GCC Code Coverage Report


Directory: common/src/
Coverage: low: ≥ 0% medium: ≥ 75.0% high: ≥ 90.0%
Coverage Exec / Excl / Total
Lines: 100.0% 17 / 0 / 17
Functions: 100.0% 1 / 0 / 1
Branches: 100.0% 12 / 0 / 12

lx_nor_flash_driver_write.c
Line Branch Exec Source
1 /***************************************************************************
2 * Copyright (c) 2024 Microsoft Corporation
3 * Copyright (c) 2026-present Eclipse ThreadX contributors
4 *
5 * This program and the accompanying materials are made available under the
6 * terms of the MIT License which is available at
7 * https://opensource.org/licenses/MIT.
8 *
9 * SPDX-License-Identifier: MIT
10 **************************************************************************/
11
12 // Portions of this file were generated with AI assistance.
13
14
15 /**************************************************************************/
16 /**************************************************************************/
17 /** */
18 /** LevelX Component */
19 /** */
20 /** NOR Flash */
21 /** */
22 /**************************************************************************/
23 /**************************************************************************/
24
25 #define LX_SOURCE_CODE
26
27
28 /* Disable ThreadX error checking. */
29
30 #ifndef LX_DISABLE_ERROR_CHECKING
31 #define LX_DISABLE_ERROR_CHECKING
32 #endif
33
34
35 /* Include necessary system files. */
36
37 #include "lx_api.h"
38
39
40 /**************************************************************************/
41 /* */
42 /* FUNCTION RELEASE */
43 /* */
44 /* _lx_nor_flash_driver_write PORTABLE C */
45 /* 6.2.1 */
46 /* AUTHOR */
47 /* */
48 /* William E. Lamie, Microsoft Corporation */
49 /* */
50 /* DESCRIPTION */
51 /* */
52 /* This function performs a write of the NOR flash memory. */
53 /* */
54 /* INPUT */
55 /* */
56 /* nor_flash NOR flash instance */
57 /* flash_address Address of NOR flash to write */
58 /* source Source for the write */
59 /* words Number of words to write */
60 /* */
61 /* OUTPUT */
62 /* */
63 /* return status */
64 /* */
65 /* CALLS */
66 /* */
67 /* (lx_nor_flash_driver_write) Actual driver write */
68 /* */
69 /* CALLED BY */
70 /* */
71 /* Application Code */
72 /* */
73 /**************************************************************************/
74 1135110 UINT _lx_nor_flash_driver_write(LX_NOR_FLASH *nor_flash, ULONG *flash_address, ULONG *source, ULONG words)
75 {
76
77 #ifndef LX_NOR_DISABLE_EXTENDED_CACHE
78
79 UINT status;
80 UINT i;
81 ULONG *cache_entry_start;
82 ULONG cache_entry_start_value;
83 ULONG cache_entry_end_value;
84 ULONG cache_offset;
85 ULONG flash_address_value;
86
87
88 /* Is the request a whole sector or a partial sector. */
89
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908090 if ((words == 1) && (nor_flash -> lx_nor_flash_extended_cache_entries))
90 {
91
92 /* One word request, which implies that it is a NOR flash metadata write. */
93
94 /* MISRA C:2012 Rule 11.4 deviation: NOR driver addresses may be logical
95 address tokens, including zero, so compare address values without
96 dereferencing them. */
97 383450 flash_address_value = (ULONG)flash_address;
98
99 /* Loop through the cache entries to see if there is a sector in cache. */
100
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1186418 for (i = 0; i < nor_flash -> lx_nor_flash_extended_cache_entries; i++)
101 {
102
103 /* Search through the cache to see if there is a cache entry. */
104
105 /* Determine the cache entry addresses. */
106 1095519 cache_entry_start = nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_sector_address;
107
108 /* Determine if the flash address is in the cache entry. */
109
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1095519 if (nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_valid)
110 {
111 1086600 cache_entry_start_value = (ULONG)cache_entry_start;
112 1086600 cache_entry_end_value = cache_entry_start_value + (LX_NOR_SECTOR_SIZE * sizeof(ULONG));
113
114
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1086600 if ((flash_address_value >= cache_entry_start_value) && (flash_address_value < cache_entry_end_value))
115 {
116
117 /* Yes, we found the entry. */
118
119 /* Calculate the offset into the cache entry. */
120 292551 cache_offset = (flash_address_value - cache_entry_start_value) / sizeof(ULONG);
121
122 /* Copy the word into the cache. */
123 292551 *(nor_flash -> lx_nor_flash_extended_cache[i].lx_nor_flash_extended_cache_entry_sector_memory + cache_offset) = *source;
124
125 /* Get out of the loop. */
126 292551 break;
127 }
128 }
129 }
130 }
131
132 /* In any case, call the actual driver write function. */
133 #ifdef LX_NOR_ENABLE_CONTROL_BLOCK_FOR_DRIVER_INTERFACE
134 113511 status = (nor_flash -> lx_nor_flash_driver_write)(nor_flash, flash_address, source, words);
135 #else
136 794579 status = (nor_flash -> lx_nor_flash_driver_write)(flash_address, source, words);
137 #endif
138
139 /* Return completion status. */
140 908090 return(status);
141
142 #else
143 UINT status;
144
145
146 /* Call the actual driver write function. */
147 #ifdef LX_NOR_ENABLE_CONTROL_BLOCK_FOR_DRIVER_INTERFACE
148 status = (nor_flash -> lx_nor_flash_driver_write)(nor_flash, flash_address, source, words);
149 #else
150 227020 status = (nor_flash -> lx_nor_flash_driver_write)(flash_address, source, words);
151 #endif
152
153 /* Return completion status. */
154 227020 return(status);
155 #endif
156 }
157